vhdl 基于cpld的8*8点阵显示显示心型

关于XILINX FPGA 内部 中文培训教材-XILINX FPGA on internal training materials in Chinese

用例化语句和case语句编写的全加器的VHDL描述。-Of statements were prepared using the full adder of the VHDL description.

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core.

xilinx的zed板详细开发资料，对初学者和开发人员都有帮助(The Xilinx zed board detailed development information, helpful for beginners and developers)

基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)

8级cordic 算法verilog (8 cordic algorithm verilog)

Quartus2环境下基于VHDL状态机的交通灯程序(VHDL state machine traffic lights based on Quartus2 environment)

all funtions for a scale meter for maps in a 8051 microcontroler with an alphanumeric lcd display

Computer Arithmetic (press 2000)

说明：  使用VHDL语言写的AVR单片机IP核， 可以直接使用，已经经过验证， 十分珍贵哦(Written in VHDL language using the AVR microcontroller IP core, can be used directly, has proven very valuable oh)