等精度测试频率计，包括程序源代码以及相关注释

能够实现 LCD时序驱动,通常cpu送出的信号为data bus信号，液晶屏幕并不能正常显示，需要lcd driver(LCD timing controller, usually cpu send out the data bus signal, so the lcd driver can t display normally, need the driver)

等精度频率计的verilogHDL的实现,我花了好长时间才写的哦

sdram控制器的开发程序，还有文档，可以参考以下(SDRAM controller development process, there is a document, you can refer to the following)

包含32为乘法器的设计，用verilog语言实现，包括booth编码的实现，booth乘法器的实现，3_2压缩器的实现，4_2压缩器的实现，华伦斯树的实现，以及两个testbench文件用于测试。(Contains 32 multiplier design, verilog language, including booth encoding implementations, booth multiplier implementations, 3_2 compressor implementation 4_2 compressor to achieve and realize China Clarence tree, and two testbench file with the to the test.)

该程序实现的N位全减器，首先实现一位的减法器，之后实现N位全减器。-Program of the N-bit-wide reduction, the first realization of a subtraction for, after all N-reduction devices.

DS18B20温度传感器，用verilog语言实现(DS18B20 temperature sensor, with the verilog language)

135个经典VerilogHDL源码和说明文档，入门的好资料-135 Classic VerilogHDL source and documentation, a good data entry

汽车尾灯控制系统 汽车尾灯控制器的VHDL程序实现 -car taillight control system controller car taillight VHDL program

用vhdl实现的booth算法乘法器，包含了multiplexer和rca adder，同时提供了一个测试文件，modelsim测试通过(Algorithm with a booth multiplier vhdl implementation, including a multiplexer and rca adder, while providing a test file, modelsim test pass)

说明：  FFT 1024 point, in 10 state