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spi_hello
SPI接口测试程序,Xilinx参考设计,ML507硬件测试通过.(SPI interface test code,Xilinx reference design,tested on ML507 platform.)
- 2013-09-01 09:37:04下载
- 积分:1
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EDA
十进制计算机,实现十进制计数功能,简单可靠(vhdl)
- 2009-12-26 21:45:43下载
- 积分:1
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DE2_PS2_Example
PS2 Module for Altera DE2
- 2017-06-20 21:04:32下载
- 积分:1
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main
完整的GMSK调制及维特比译码,程序中包括了高斯滤波器的设计,调制相位的计算,并采用了维特比译码算法解调出原始码元,最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
- 2020-11-03 16:19:54下载
- 积分:1
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警卫控制系统,主要 控制 电梯系统 ,通过422通讯格式完成与电梯系统之间的 通讯协议。...
警卫控制系统,主要 控制 电梯系统 ,通过422通讯格式完成与电梯系统之间的 通讯协议。-Security control system, the main control elevator systems, through to complete the 422 communication format, communication protocol between the elevator system.
- 2022-01-25 18:31:08下载
- 积分:1
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I2S_2
that file is different I2S example
- 2014-11-27 06:39:52下载
- 积分:1
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GTX4
光纤发送接收模块,verilog编写,主要用于光纤的发送和接收,波长1310nm(Fiber optic transmitter receiver module, verilog written primarily for transmitting and receiving the optical fiber, wavelength 1310nm)
- 2016-06-28 14:06:40下载
- 积分:1
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计数器的VHDL代码
这是VHDL中计数器的代码。
- 2022-07-14 16:48:21下载
- 积分:1
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Hilbert
说明: 基于altera fpga的fir IP核实现希尔伯特变换,有matlab仿真(Based on Altera FPGA fir IP core to achieve Hilbert transform, matlab simulation)
- 2020-10-05 11:27:38下载
- 积分:1
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median
说明: 用verilog编辑的中值滤波器!语言旁表有注释方便理解!(Using Verilog editor median filter! Language beside the table annotated to facilitate understanding!)
- 2008-11-03 09:21:18下载
- 积分:1