256 点 FFT 实现的设计与实现

用Verlog HDL编写的数字钟程序，包含时，分，秒，进位，解码，扫描显示等功能。-Written by Verlog HDL ，a digital clock program, including hours, minutes, seconds, into the place, decoding, scanning display.

包括Cyclone II EP2C20 原理图.CycloneII开发板原理图fpga.EP1C3T144 FPGA develop board manual.EP1C6Q240C6开发板原理图.EP2C8开发板原理图.EPM1270F256C5 MAX_II_board_schematics.SF-EP1V2+FPGA开发板原理图.XC3S400红色飓风开发板原理图.红色飓风II代开发板原理图2.(Including the Cyclone II EP2C20 schematic . CycloneII development board schematics fpga.EP1C3T144FPGA develop board manual.EP1C6Q240C6 development board schematic . EP2C8development board schematics . EPM1270F256C5MAX_II_board_schematics.SF-EP1V2+FPGA development board schematic . XC3S400red hurricane development board schematics. Red hurricane II development board schematic diagram2)

这个我也太清楚是什么 反正师兄们说有用 发大家-I am also very clear that what is useful anyway, say senior U.S. fa

这是一个很好的基于verilog的串口通信422模块，已经经过多次验证，绝对可靠，可直接使用，本人已在工程中多次使用，无误差(This is a good serial communication based on Verilog 422 module, has been repeatedly verified, absolutely reliable, can be used directly, I have repeatedly used in the project, no error)

ARM7 VERILOG源码，非常精简，3级流水线(ARM7 VERILOG source code, very streamlined, 3-stage pipeline)

本程序使用Verilog语言实现了SPI接口的设计，可以直接烧到FPGA实现与MCU的通信,自带有测试文件。(The program uses the Verilog language design SPI interface, you can burn directly communicate with the FPGA, MCU, comes with a test file.)

用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机。-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine.

说明：  关于quartus与modelsim 仿真(about quartus and modelsim simulator)

我的项目执行 filtrage 和抽取使用多相分解，在这种情况下，抽取因子被带到 5，所以筛选器由 5 集团过滤器和每个 oprates 在频率采样除以 5

电子闹钟：基于fpga的电子闹钟设计，采用模块化方式-Electronic alarm: FPGA-based electronic alarm clock design, modular approach