256 点 FFT 实现的设计与实现

在QUARTUS II上实现（7,4）汉明码的译码VHDL语言设计((7,4)Hamming decoder)

Verilog很不错的进阶书!看完后对数字模拟集成电路设计有个深入的认识!-This book is very important for a designer who wants to design a great digital circuits!

tdma参数化模块。可以自动生成2的n次的tdma哥时隙，用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)

说明：  LVDS De-serialization

pc104接口的verilog代码，仅供参考-pc104 verilog interface code for reference purposes only

浮点加法器的用Verilog实现，32位的浮点加法器(Floating point adder Verilog)

自己写的 AXI master code(AXI master code)

fsk调制与解调，此程序经过验证，可以运用，通讯方面的同学可以用-FSK modulation and demodulation, this procedure has been verified and can use communications students can use

超級好用 25M~100HZ的除頻器 寫了好久 超級實用 歡迎下載(Super easy to 25M ~ 100HZ of divider wrote a long time super practical welcome to download)

世界时钟，最简单的vhdl的fpga设计，是vhdl语言的入门级，jigon供参考娱乐