可以在运行时更改 PWM 占空比和期间

测试过可用的SD仿真模型，VERILOG语言(SD card simulation modle, test OK)

基于Verilog的图像采集、处理和存储程序，初学者参考，高手绕道。(Verilog-based image acquisition, processing and storage procedures, beginners reference, master bypass.)

利用VHDL 硬件描述语言设计一个0~9999 的加法计数器。根据一定频率的触发 时钟，计数器进行加计数，并利用数码管进行显示，当计数到9999 时，从0 开始重新计数(Use of VHDL hardware description language design a 0 ~ 9999 addition counter. According to a certain frequency of the trigger The clock, counter add count, and use digital pipes to show that when the count to 9999, starting from 0 to count )

this program does something im not sure what but all i want is to get into the damn site thank you

基于VHDL语言，实现对ADC0809简单控制(Based on VHDL language, to achieve the ADC0809 simple control)

说明：  一种64位的DES加密代码，可以使用挂在APB上(dec enc key to 64 bit rate)

16位并行乘法器源代码，booth2编码，二进制树拓扑结构(16bits parallel multiplier source code )

基于FPGA控制的DDS波形发生器，可在Cyclone IV系列板子上使用，已经过仿真验证(Based FPGA control DDS waveform generator in Cyclone IV series board on use, has been simulation)

vc707 board ucf xdc files

vhdl 的testbench编写教程，英文ppt以及源码工程(Write tutorials, as well as English ppt Source of engineering vhdl testbench)