Cyclone-V-GX-开发板原理图-(5CGXFC5C6F27), Audio,HDMI 部分Demo

矩阵求逆模块硬件实现,用verilog语言，基于ISE开发环境(implement of inverse matrix)

circuit design with VHDL e-book MIT Press....

边界扫描技术相关资料，含各个模块的介绍。很有参考价值。(JTAG TAG CONTROLLER)

基于avgt开发板的jesd204b源代码，需要安装Quartus软件(Avgt development board based on the jesd204b source code)

说明：  包含一个ALU，实现斐波那契数列的计算。1.接受两个6位二进制输入。2.通过手动输入的时钟驱动每个周期进行一次计算。3.结果输出到led灯（使用NEXYS4开发板）(Including an ALU to realize the calculation of Fibonacci sequence. 1. Accept two 6-bit binary inputs. 2. Each cycle is driven by a clock input manually. 3. Output to LED lamp (using NEXYS4 development board))

设计了一个电子时钟，功能包括定点报时，设置闹钟，校时等(Designed an electronic clock, features include fixed-point timekeeping, setting alarms, school hours, etc.)

PicoRV32 is a CPU core that implements the RISC-V RV32IMC Instruction Set. It can be configured as RV32E, RV32I, RV32IC, RV32IM, or RV32IMC core, and optionally contains a built-in interrupt controller. Tools (gcc, binutils, etc..) can be obtained via the RISC-V Website. The examples bundled with PicoRV32 expect various RV32 toolchains to be installed in /opt/riscv32i[m][c]. See the build instructions below for details.

基于FPGA的电子密码锁设计与实现，语言是VHDL语言，有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)

this program does something im not sure what but all i want is to get into the damn site thank you

说明：  Basic principle of LDPC code and FPGA implementation of LDPC code