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16ChannelDeserializer
说明: LVDS De-serialization
- 2019-06-20 14:53:25下载
- 积分:1
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verilog HDL程序设计开发实验
最详细的verilog实例集合,快速入门到精通。作为实验指导教程,本教程分为两大部分:FPGA硬件系统基础verilog实验和高级接口控制设计实验。对于初学者可以很快的入门。对于曾经接触过FPGA者,可以直接接触后面比较复杂的接口控制实例。
- 2022-08-12 16:09:36下载
- 积分:1
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key_test
fpga的按键程序,实现按键和led的对应点亮。(The key program of FPGA realizes the corresponding lighting between keys and led.)
- 2018-04-13 00:00:28下载
- 积分:1
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VCS
VCS详细学习资料。内涵专业研究院所内部培训资料。适合于初学者学习使用,易于上手。(VCS learning)
- 2012-10-26 10:14:09下载
- 积分:1
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phone
用DE0开发板实现电话计费器,基本功能:可设置通话模式,能初始化话费余额,拨动开关可进入通话模式,并根据通话时间和相应通话模式扣除相应的费用。通话过程中能够通过开关切换显示通话时间和话费余额,并可暂停通话。压缩包里有详细的WORD文档的说明,包括波形仿真和DE0的引脚功能介绍。(Implemented by DE0 board telephone billing, basic function: to set the call mode, you can initiate credit balance, toggle switch into the talk mode, and deduct the cost of a call based on call time and the corresponding mode. Call talk time and can be displayed by switching credit balance, and mute. Compression bag has a detailed description of WORD documents, including the waveform simulation and DE0 pin function description.)
- 2020-11-06 13:19:49下载
- 积分:1
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core_arm.tar
ARM7系统IP核的VHDL语言源代码,需要的开发环境是QUARTUS II 6.0。(ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.)
- 2021-04-20 00:18:51下载
- 积分:1
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各种基础module打包下载全集
例如分频器,alu,ram的verilog实现(The implementation of divider, alu, ram etc. in verilog)
- 2020-10-12 23:37:32下载
- 积分:1
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cache 闪存 快速缓存
本代码是cache代码,采用最近最少使用算法。代码量大约1000-2000行,程序包括cache替换算法的实现。映像规则的选择,以及全部的仿真程序。
- 2022-07-02 02:46:57下载
- 积分:1
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sound_ranging
改VHDL代码可以实现超声波测距的功能,其精确度达到US级,可以用七段数码管显示其数值(sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging )
- 2014-06-13 20:42:03下载
- 积分:1
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irdecode
自己编写的红外解码子程序,但CPU资源占用较高,作教学示范用途。(prepared their infrared decoding routines, but higher occupancy CPU resources for teaching demonstration purposes.)
- 2006-11-05 13:51:28下载
- 积分:1