基于Nios II开发板的VGA控制器的DE1控制…

用Verilog实现一个基于Mesh拓扑结构的路由器网络(Using Verilog to implement a router network based on Mesh topology)

Testbench 不仅要产生激励也就是输入，还要验证响应也就是输出。当然也可以只产生 激励，然后通过波形窗口通过人工的方法去验证波形，这种方法只能适用于小规模的设计(The Testbench not only to generate incentives to input, verify that the response is output. Of course, can only produce Incentive, and then the waveform by the waveform window by artificial means to verify, this method is only applicable to small-scale design)

这本书是夏宇文老师在几年前编写的，非常是和初学者，里面有哦对verilog 的详细讲解(a book write by xiyuwen ,This book provides a detailed explanation of verilog )

该模块采用cordic算法计算正弦和余弦，并采用参数化方式实现。 ；包中存在其他模块。

基于Verilog的串口通信源码 ，实现串口通信功能(Verilog source code based on serial communication)

这是OFDM调制matlab的程序，中间详细描述了调制的过程，希望对大家有用。(This is the OFDM modulation matlab procedures, a detailed description of the intermediate modulation process, I hope useful.)

MATLAB to HDL Code conversion

说明：  经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

verilog 或门程序 初学者必备。。。。。。。。。。。。(verilog )

vhdl编写的FPGA与DSP接口程序，在FPGA内分配了两块双BUFFER与DSP进行通信(vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP)