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用vhdl做的计算机组成原理课程设计的资料,实现加法运算,进行求和,仿真实例等资料!...
用vhdl做的计算机组成原理课程设计的资料,实现加法运算,进行求和,仿真实例等资料!-Vhdl to do with the computer information on the composition of curriculum design principles to achieve the addition operation, a sum, simulation examples, etc.!
- 2022-03-18 00:56:15下载
- 积分:1
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apb_spi
Simple SPI interface realization on Verilog HDL with parameterized FIFO and APB interface
- 2021-04-06 16:19:02下载
- 积分:1
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流水线乘法器的VHDL实现,希望对你会有用!
流水线乘法器的VHDL实现,希望对你会有用!-Pipelined multiplier in VHDL implementation, you will want to use!
- 2023-04-03 22:35:03下载
- 积分:1
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dds digital shift Signal Generator, full
dds数字移相信号发生器,功能齐全通过验证-dds digital shift Signal Generator, full-featured validated
- 2022-08-15 06:38:32下载
- 积分:1
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DS1302
基于DS1302芯片的VERILOG 语言数字钟。可实现年月日时分秒显示。(DS1302 chip-based language VERILOG digital clock. Date can be achieved when every minute display.)
- 2014-06-26 15:53:06下载
- 积分:1
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Coding Style
说明: 良好的Coding Style能减少Bug,减少锁存器出现的可能以及其他隐藏逻辑错误,也有助于减小芯片面积或所用资源(Good Coding Style can reduce Bug, reduce the possibility of latches and other hidden logic errors, and also help to reduce chip area or resources used.)
- 2020-06-17 12:00:01下载
- 积分:1
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基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助
基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助-and ideally xinlinx 7 of the code led display program, and I hope to help you
- 2022-02-03 23:57:12下载
- 积分:1
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FPGA realization of the LCD interface, VHDL programming, FPGA chips for Altera
FPGA实现的LCD接口,VHDL编程,FPGA芯片为ALtera公司的EP2c35-FPGA realization of the LCD interface, VHDL programming, FPGA chips for Altera
- 2022-09-14 14:30:09下载
- 积分:1
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zidongshouhuoji
使用VHDL语言实现的一个自动售货机的程序。适合VHDL初学者使用。(VHDL language using a vending machine program. VHDL suitable for beginners.)
- 2011-04-29 21:28:00下载
- 积分:1
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gcounter1
数字钟vhdl实现,在线测试无误,具有闹钟,对表功能(Digital clock vhdl implementation, online testing is correct, with alarm, the table function)
- 2013-10-19 22:06:16下载
- 积分:1