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DESHTM
用VHDL语言实现了DES加密算法,其中包含了测试程序,能够进行仿真。(Using VHDL language implementation of the DES encryption algorithm, which contains the test procedures can be simulated.)
- 2009-03-15 12:29:56下载
- 积分:1
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微功率无线模块、小功率无线数传模块、远距离无线通信模块、数传电台、远距离无线通信基站以及无线通信收发器等系列产品,产品主要有无线数传模块、无线通信模块、无线通讯...
微功率无线模块、小功率无线数传模块、远距离无线通信模块、数传电台、远距离无线通信基站以及无线通信收发器等系列产品,产品主要有无线数传模块、无线通信模块、无线通讯模块、无线收发模块、无线模块、无线射频模块等等。-micropower wireless modules, low-power wireless module, remote wireless communications modules, data-transmission stations, long-distance wireless communications base stations and wireless communications transceiver series products, the main products are wireless module, wireless communications modules, wireless communications modules, wireless transceiver module, wireless modules, RF modules and so on.
- 2022-06-12 10:06:56下载
- 积分:1
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wm8731
wm8731的使用,用于音频信号的采集或者产生(wm8731 use for audio signal acquisition or produce)
- 2009-07-20 15:51:33下载
- 积分:1
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VHDL_count 从 0 到 9 4 7 段 LED 显示器 (đếm 0 đến 9 hiển 施耐 4 带领 7 đoạn)
VHDL_count 从 0 到 9 4 7 段 LED 显示器 (đếm 0 đến 9 hiển 施耐 4 带领 7 đoạn)
- 2022-01-20 23:11:51下载
- 积分:1
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VHDL开发环境,电梯控制系统,实现电梯的上下传送控制。
VHDL开发环境,电梯控制系统,实现电梯的上下传送控制。-VHDL development environment, elevator control system, transmission control up and down elevators.
- 2022-03-15 14:58:09下载
- 积分:1
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DDS
基于ARM的DDS信号发生器设计,可以产生各种信号的波形,生成所需要的信号,可供实验用(DDS signal generator based on ARM, can produce a variety of signal waveform can be used for experiment)
- 2013-03-29 18:49:52下载
- 积分:1
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In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Ver...
在Altera芯片2C35F672平台上的FFT程序,采用DSPBuilder5.0,生成Verilog文件。开发环境:QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
- 2022-03-16 05:08:13下载
- 积分:1
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isjtc
Use serial programming examples matlab GUI implementation, Independent component analysis for image processing, Realize image watermarking, de-noising, plus noise and other functions.
- 2017-08-14 17:01:39下载
- 积分:1
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FPGA的设计流程手册
FPGA设计流程指南
介绍基本的设计方法-FPGA Design Process Manual
- 2022-08-14 04:24:11下载
- 积分:1
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课程设计要求设计并用FPGA实现一个数字频率计,具体设计要求如下: 测量频率范围: 10Hz~100KHz 精度: ΔF / F ≤ ±2 % 系统外部...
课程设计要求设计并用FPGA实现一个数字频率计,具体设计要求如下: 测量频率范围: 10Hz~100KHz 精度: ΔF / F ≤ ±2 % 系统外部时钟: 1024Hz 测量波形: 方波 Vp-p = 3~5 V 硬件设备:Altera Flex10K10 五位数码管 LED发光二极管 编程语言:Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL
- 2022-07-04 09:14:33下载
- 积分:1