SPI串口的内核实现spicore SPI串口的内核实现spicore

详细的说明了FPGA设计的整个流程 FPGA设计全流程Modelsim>>Synplify.Pro>>ISE(Detailed description of the FPGA design flow of the entire FPGA design flow full Modelsim> > Synplify.Pro> > ISE)

SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)

利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware description language of the people to see!

基于FPGA的正弦脉宽调制波vhdl代码，同时输出正弦波与SPWM(Sine pulse width modulation wave VHDL code based on FPGA, at the same time with SPWM output sine wave)

移位除乘法器带testbench好用的工程(Useful addition to the shift multiplier works with testbench)

说明：  FPGA与PC端实现串口数据的收发，先从PC端接收数据，然后发回给电脑，可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)

说明：  verilog 编写的ldpc编码，含有两个文件(LDPC written by Verilog)

DE2将连接到LCD布局上，为Terasic off技术公司附上系统代码

this a vhdl code for usb-this is a vhdl code for usb

掌握二-十进制(BCD码)异步计数器的工作原理和设计方法； 掌握中规模集成二-五-十进制异步计数器74LS90的功能及其应用；(Master II- Decimal (BCD code) the principle and an asynchronous counter design grasp the scale of integration in two- five- Decimal asynchronous counter 74LS90 features and applications )