vhdl设计事例,有助于FPGA初学着,High

RS（255，223）编码器，已实际运用到产品中(RS (255,223) encoder has actually applied to products)

program for half subtractor.

AD conversion using LTC1298

基于有限状态机的健壮性测试研究。 关键词：健壮性测试；增强有限状态机；全球平台；安全通道协议(The Research of Robustness Testing Based on FSM)

VHDL语言编写的FIR滤波器源码 对于嵌入式设计者有很好的指导作用 -VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding

xillinx Spartan6 FPGA DDR 接口设计指南(xillinx Spartan6 FPGA DDR Interface Design Guidelines)

本文件是可以直接使用下载到FPGA里面使用，里面包含时钟分频电路，串并转换和并串转换电路，多通道信号加权的乘加电路等。-The document may download to FPGA chip to complete the clock divider,serial-to-parallel,parallel-to-serial,and multiple-add circuit for multiple channels weight calculation

沃尔什函数发生器工程文件，Quartus Ⅱ 13.0版本(Walsh Function Generator)

HDB3编码通过verilog实现，通过modelsim仿真(HDB3 coding is implemented by Verilog and simulated by Modelsim)

mipi传输，用于新型图像传感器的传输问题(MIPI transmission, new image sensors for the transmission problem)