这是一个很好的USB程序。

verilog实现计时器timer，可直接用于芯片开发中。(verilog achieve timer, it can be directly used for chip development.)

跑马灯-是移位寄存器 有6个灯，无延时entity-Bomadeng-shift register is a six lights, without delay entity

说明：  资料是本人根据相关文献资料用vhdl语言编写的旋转机械鉴相信号倍频的程序，multifre1.vhd是倍频程序，multifre1.vwf是仿真波形文件，stp1.stp是虚拟逻辑分析仪signaltap文件。该倍频程序可以直接使用，可以设置倍频数，修改实体参数N即可。(According to the literature data is the information I have written in with vhdl Rotating Machinery Kam believe that the procedure multiplier number, multifre1.vhd is the multiplier process, multifre1.vwf is the simulation waveform files, stp1.stp a virtual logic analyzer signaltap file. The multiplier process can be used directly, you can set the multiplier number, modify the parameter N can be solid.)

基于verilog的FFT设计，使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)

文章运用分级抽取和多相滤波的方法改进传统CIC滤波器的结构,降低了系统工作频率,运用幅度改进函数(ACF)和外加级联余弦预滤波器的技术改进了滤波器频率响应,提出了一种高效的算法结构,改善了通带损耗,增大了阻带衰减,对CIC滤波器的实际应用和深入研究有着现实意义。 (Article the use of hierarchical multi-phase extraction and filtering methods to improve the structure of the traditional CIC filter, reducing the system operating frequency, the use of margin to improve the function (ACF) and the cosine cascade plus pre-filter technology to improve the filter frequency response, the an efficient algorithm to improve the pass-band loss, increases the stopband attenuation of the CIC filter in practical applications and in-depth study has practical significance.)

使用nios2点亮一个led灯，使用软件quartus13.0，开发板de2-115(nios2 led quartus13.0 de2-115)

一个用于数字解调的应用程序，主要用于数字接收机的应用方面-A demodulator for digital applications, mainly for the application of digital receiver

浙江大学体系结构实验课代码，5级流水线实现旁路和停顿(5-stage pipeline to achieve realization of the bypass pipeline bypass pause 5 pause)

51单片机测试程序，ＩＣ:UC1676,4线串口(51 MCU test program, IC:UC1676 4-LINE, SPI INTERFACE)

generate sine wave. Inputs : Amplitude, phasein, frequency