VHDL 的想法

通信系统中数据的传输以帧为单位，在FPGA中帧头检测是通信系统中的一部分，该程序实现了FPGA中帧头的检测。(Transmission of data in a communication system in units of frames, the frame header is detected in the FPGA part of the communication system, the realization of the frame header is detected in the FPGA.)

VHDL实现PI调节的算法。内部使用整数计算，避开了浮点数的运算。仿真结果正确-VHDL realize PI regulator algorithm. Internal use integer calculations to avoid the floating point arithmetic. The simulation results correctly

里面是VHDL的一些例子，大家可以看一下，蛮不错的，对大家提高VHDL水平很好的.-There is some examples of VHDL, we can look pretty good on the U.S. improve the level VHDL good.

用来实现IRIG_B码的解码程序，在XILINX ISE上运行过没有问题，(Used to achieve IRIG_B code decoding process, in XILINX ISE run-off is no problem,)

This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)

基于FPGA的AD和DA设计代码及文档(Design code and document of AD and DA based on FPGA)

这个verilong代码实现的功能是radar processing的功能。(This verilong code function is radar processing functions.)

PID算法控制点击速度，PWM脉宽调制方法(PID algorithm to control the motor Speed)

在开发板EGO1上实现的图形记忆游戏，白块按下确认建，黑色块不按确认键(memory game in verilog)

ARM7 VERILOG源码，非常精简，3级流水线(ARM7 VERILOG source code, very streamlined, 3-stage pipeline)