如何在语言 VHDL 实现液晶显示中显示的数据转移

Syllabus for VSC-HVDC course

以前学习VHDL语言时做的一个电子闹钟程序，可以实现时，分，秒的计时以及定时，校时，闹钟，整点报时的功能。-VHDL language before learning to do procedures in an electronic alarm clock, you can realize hours, minutes and seconds of time and from time to time, school time, alarm clock, the whole point timekeeping function.

PWM调制流水灯的亮度，可以看到流水灯从亮到暗(PWM modulation)

verilog code for 8 bit alu

SoC sample Code using Altera Xcaliber, good usefull SoC.

说明：  FPGA实现基带成型滤波器，升余弦滚降系数，多进制调制(FPGA)

加法计数器的VHDL工程，程序，仿真图形-adder jishuqi de VHDL FANGZHEN ,CHENGXU

基于单片机与CPLD的 等精度频率计，VHDL语言-Based on SCM and CPLD

STT-MRAM磁性存储器全部verilog代码和仿真验证代码，包括行为模块，读写模块和控制模块，已经经过验证完全正确(STT-MRAM magnetic memory all the code and simulation code, including behavior module, reader module and the control module, has been proven entirely correct)

说明：  在FPGA板卡上面，通过单个按键实现串口的发送功能，带仿真需要自行修改一下工程配置(On the FPGA board, the sending function of the serial port is realized by a single key, and the engineering configuration needs to be modified by the simulation)