这是一个基于FPGA实现的GPS的程序，保证可以用

AMBA总线的AHB+APB源程序，供初学者学习。(Verilog for AHB and APB)

uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file

说明：  在zedboard上运行的神经网络架构，方便移植。(Run lenet-5 on zedboard)

2011年 电赛 E题 简易数字信号传输性能分析仪FPGA信号发生部分 包括m序列，伪随机序列，曼彻斯特编码 程序 和单片机部分程序(2011 CEC E title simple digital signal transmission performance analyzer FPGA signal part of the program and single-chip part of the program)

xilinx的ddr sdram控制器文档-xilinx of ddr sdram controller documentation

A simple Manchester Encoder to convert serial data to Manchester encoded data.

adder_array的设计。加法器阵列设计，顶层模块，四步流水，21位(adder_array the design. The adder array design, top-level module, four-step pipeline, 21)

说明：  2018全国大学生FPGA创新设计大赛南京总决赛封闭测试题目，以及自己编写的verilog和testbench，欢迎学习借鉴(The closed test topic of the 2018 National Undergraduate FPGA innovation design competition Nanjing finals, as well as Verilog and testbench compiled by ourselves, are welcome to learn)

verilog 键盘输入程序，用于led灯的显示-Verilog keyboard input program for led lights display

VHDL_COUNTING 0_9_LED 7 段 (ĐẾM 0 ĐẾN 9 HIỂN THỊ LED 7 ĐOẠN BẰNG NGÔN NGỮ VHDL)