a cycle ruduandency code

本程序包含：EEPROM的功能模型(eeprom.v)、读/写EEPROM的verilog HDL 行为模块（eeprom_wr.v）、信号产生模块（signal.v）和顶层模块(top.v) ，这样可以有一个完整的EEPROM的控制模块和测试文件，本文件通过测试。(This procedure includes: EEPROM of the functional model (eeprom.v), read/write EEPROM acts of verilog HDL modules (eeprom_wr.v), signal generator module (signal.v) and top-level module (top.v), this can have a EEPROM complete control module and test document, this document is to pass the test.)

VHDL_COUNTING 与 4 使脉冲和使用 3 按钮了，下来，停止 （Mạch đếm với 4 xung ENA sử dụng 3 nút nhấn lên，xuống và dừng lại）

说明：  802.16d 的卷积编码和解码的VHDL实现(802.16d cc encoding and decoding,writing in VHDL)

用verilog语言编写的串口读写程序，波特率可调，亲测可用。(this is a program for UART by verilog, which is useful.)

完整的OFDM仿真程序，包括QPSK,16QAM调制，基于MATLAB，各个步骤都有详细的说明。(OFDM simulation program, based on the complete MATLAB, every step is described in detail.)

采用vhdl语言实现12路的pwm波控制。-Language implementation using vhdl wave pwm control of the road 12.

2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发(Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development)

The aim of the ECG simulator is to produce the typical ECG waveforms of different leads and as many arrhythmias as possible. My ECG simulator is a matlab based simulator and is able to produce normal lead II ECG waveform.

基于VHDL可编程BPSk调制教学~~~十分好用`~容易学会-VHDL-based programmable BPSk modulation of teaching is very good ~ ~ ~ `~ easy to learn to

多功能数字钟，在quartusII软件平台上实现的verilog源代码。大家试试看。(Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.)