a cycle ruduandency code

说明：  VHDL实现的算术逻辑计算单元（ALU），包括modersim测试文件，即仿真结果。(VHDL implementation of the arithmetic logic calculation unit (ALU), including modersim test file, the simulation results.)

自动售货机VHDL程序与仿真的vhdl的源代码-Vending machine VHDL procedures and simulation of vhdl source code

Conduct a digital system ( electronic lock ) using hierarchic methodology . An electronic lock is a device that allows access or opening of a system , as long as the key or combination to enter match with which it is predefined in said lock .

注意：是verilog语言写的 一bit的全加器，实现4位数的串行加法器，一个时钟能完成一次一bit的全加(Note: It is verilog language to write a bit full adder, to achieve four-digit serial adder, a clock can be completed once a bit full adder)

调制解调器是在发送端通过调制将数字信号转换成模拟信号，而在接收端通过解调将模拟信号转换为数字信号的一种装置。这个程序用VHDL语言编写，实现了二进制振幅键控（2ASK）的调制与解调；二进制频移键控（2FSK）的调制与解调，二进制相位键控（2PSK）的调制与解调过程。

CORDIC(Coordinate Rotation Digital Computer)算法即坐标旋转数字计算方法。 CORDIC算法,能够通过平移和累加快速实现基础的数学函数,包括三角函数,开方,指数,对数,平方根等函数。(CORDIC (Coordinate Rotation Digital Computer) algorithm for the coordinate rotation digital calculation. CORDIC algorithm can be achieved through the rapid translation and accumulation based on mathematical functions, including trigonometric, square root, exponential, logarithmic, square root and other functions.)

A-law Encoder (VHDL)

基于CPLD 的光电脉冲码盘 信号四倍频电路设计-CPLD-based electro-optical pulse encoder signals four multiplier circuit design

基于AT89C51的密码锁（掉电可记忆密码）的程序(Based on AT89C51 lock (down to remembering passwords) program)

vhdl,序列信号检测模块，此模块检测1110010，可改为任意序列，输出电位为1为检测出，否则为0-vhdl, sequence of signal detection module, this module testing 1.11001 million, can be changed to an arbitrary sequence, the output potential of an as detected, otherwise 0