Traffic Light controller

第一次输入和输出第一缓冲 vhdl 代码

说明：  VHDL语言100例详解。详细讲解了用VHDL语言进行数字电路和数字系统设计的知识。用100个实例，不仅进行基础的门电路设计，而且还有较为复杂的数字系统设计。这些实例可以直接被调用。(VHDL Elaborates on 100 cases. Detailed account of VHDL for digital circuits and digital systems design knowledge. With 100 examples, not only for infrastructure gate design, but also more complex digital system design. These examples can be called.)

说明：  用VERILOG语言实现的频谱分析仪（FFT)(VERILOG language with the Spectrum Analyzer (FFT))

反应速度测试小游戏，最小外设cpld游戏，带设计说明书(Reaction speed test games, the minimum peripheral cpld game, with design specifications)

基于VHDL语言，实现对ADC0809简单控制(Based on VHDL language, to achieve the ADC0809 simple control)

设计一个具有同步置1，异步清零的D触发器。 设计一个类似74LS160的计数器(Design an D trigger with synchronous reset 1 and asynchronous reset. Design a counter like 74LS160.)

LDPC COded OFDM System

说明：  FPGA与PC端实现串口数据的收发，先从PC端接收数据，然后发回给电脑，可通过串口助手验证。(The serial port data is sent and received between the FPGA and the PC. First, the data is received from the PC, and then sent back to the computer. It can be verified by the serial port assistant.)

一个小寄存器堆，使用参数化编程，附有仿真代码，可直接在vivado（2018.2版本及以后）上运行(A small register heap, using parametric programming)

VERILOG HDL 实际工控项目源码 开发工具 altera quartus2-verilog HDL actual industrial projects source development tools altera quartus2