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基于FPGA的多功能电子时钟的设计很经典的哦
基于FPGA的多功能电子时钟的设计很经典的哦-FPGA-based multi-functional electronic clock designs are very classic Oh
- 2022-03-21 07:02:37下载
- 积分:1
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华为 Verilog基本电路设计指导书
说明: 华为 Verilog基本电路设计指导书--本文列举了大量的基本电路的Verilog HDL 代码,使初学者能够迅速熟悉基本的HDL 建模;同时也列举了一些常用电路的代码(Huawei Verilog basic circuit design instruction)
- 2020-07-04 11:00:01下载
- 积分:1
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saa7113_vhdl-config
saa7113_配置.SAA7113视频解码系列芯片的一种,8位彩色配置(saa7113_ configuration. SAA7113 video decoder chips in an 8-bit color configuration)
- 2013-11-26 08:57:58下载
- 积分:1
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infrared_receive
红外接收处理,根据外部波形记录波形的高低电平时间,从而得到波形数据。(Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.)
- 2013-09-27 11:09:02下载
- 积分:1
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suoxianghuan
常用的锁相环技术,此程序是我在设计高频电路中运用的,具体见程序,经调试无问题(Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging)
- 2008-08-19 12:02:31下载
- 积分:1
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Verilog_135example
关于硬件描述语言Verilog的135个经典实例,从易到难,对Verilog的编程有很大的帮助。(About the Verilog hardware description language 135 classic example, from easy to difficult, for Verilog programming of great help.)
- 2013-06-17 10:29:43下载
- 积分:1
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train_controler
train controler by verilog
- 2012-09-03 16:16:23下载
- 积分:1
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S3EStarter_user-guide
Xilinx Spartan-3E Starter Kit Board User Guide(中文用户手册)(Xilinx Spartan-3E Starter Kit Board User Guide)
- 2012-04-30 10:14:18下载
- 积分:1
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CodedLOCK
基于FPGA的电子密码锁设计与实现,语言是VHDL语言,有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
- 2013-08-27 21:37:06下载
- 积分:1
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4
通过监测工作状态实现带有IIC通讯功能的数据发送接收(to implement the sending and receiving data function of iic
communication )
- 2013-09-29 09:51:55下载
- 积分:1