verilog例子，有130多个，值得参考，新手很有帮助

使用QuartusII软件，利用VHDL语言设计实现CPU,其中包含时序图仿真。(Using software QuartusII, using VHDL language to design the CPU, which contains sequence diagram simulation.)

&单元格

verilog例子很丰富，几个经典的,希望对初学者有所帮助-verilog examples of very rich, a few classic, and want to be helpful for beginners

这个我弄了好久，伤心了。不过，自己喜欢，终于把他给做了出来，过程是相当的复杂，不信。你们可以下下来看看，有不懂得可以咨询我

同步fifo的调用程序，调用Quartus II 9.0 (32-Bit)中的fifo模块(Synchronous fifo calling program, call Quartus II 9.0 (32-Bit) in fifo module)

JTAG design verilog code.

FPGA的测频程序，用了D触发器，能测1hz到几百hz(FPGA frequency measurement procedures, using a D flip-flop, can be measured to a few hundred hz 1hz)

说明：  xilinx 平台的SPI从接口实现源码，供参考学习(used xilinx,slave-spi interface.)

说明：  利用FPGA实现对外设按键的控制，例如用户库用按键控制跑马灯的效果(FPGA is used to realize the control of external keys, such as the effect of user database using keys to control the running horse lamp)

Multiplication in Verilog code