登录
首页 » VHDL » Study the performance of state machine. Rar inspect the performance of state mac...

Study the performance of state machine. Rar inspect the performance of state mac...

于 2023-04-13 发布 文件大小:225.94 kB
0 142
下载积分: 2 下载次数: 1

代码说明:

状态机的性能考察.rar 状态机的性能考察.rar-Study the performance of state machine. Rar inspect the performance of state machine. Rar

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • ADS8509
    FPGA驱动高输入电压范围的ADS8509芯片,采样范围广,适合前端大信号处理(FPGA drive a high input voltage range ADS8509 chip, sampling a wide range, suitable for large front-end signal processing)
    2015-08-10 22:03:59下载
    积分:1
  • 一个双向总线的vhdl实现
    一个双向总线的vhdl实现-a two-way bus VHDL achieve
    2023-07-29 00:40:02下载
    积分:1
  • this a fpga sparttan 3e based project in which i have made a game based on vg...
    this a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .-this is a fpga sparttan 3e based project in which i have made a game based on vga interface . this file is the supporting file for ps/2 interface .
    2022-05-21 12:25:58下载
    积分:1
  • dma_hussam
    verilog code for dma
    2021-04-24 19:09:04下载
    积分:1
  • 01_test
    说明:  FPGA测试程序,仅供测试硬件是否能够运行,主要功能是点亮运行指示灯(The main function of the test program of FPGA is to light the running indicator.)
    2019-06-20 03:21:28下载
    积分:1
  • sd_slave_device
    verilog source code for SD card SLAVE DEVICE IP-Core
    2021-04-12 22:18:56下载
    积分:1
  • ComunicationRealizationBetweenFPGAandSerialInterfa
    说明:  杜晓斌和陈兴文-FPGA和单片机串行通信接口的实现一文提出了FPGA与单片机实现数据串行通信的解决方案。在通信过程中完全遵守RS232 协议,给出了发送模块的vhdl源代码。 (杜晓斌and陈兴文-FPGA single-chip serial communication interface and the realization of a text proposed by the FPGA and MCU serial data communications solutions. In the communication process in full compliance with the RS232 protocol is given to send the VHDL source code modules.)
    2008-11-18 15:41:34下载
    积分:1
  • hard work for Dictyophora development. . We hope that the right useful.
    辛辛苦苦的作品应用于DE2 的 开发。。希望对大家有用。-hard work for Dictyophora development. . We hope that the right useful.
    2022-05-25 11:15:19下载
    积分:1
  • 华为内部的FPGA设计培训教程,详细阐述了设计流程图、Verilog HDL设计、逻辑仿真、逻辑综合。对大家的学习一定有帮助的。...
    华为内部的FPGA设计培训教程,详细阐述了设计流程图、Verilog HDL设计、逻辑仿真、逻辑综合。对大家的学习一定有帮助的。-Huawei within the FPGA design training tutorial, a detailed flow chart of the design, Verilog HDL design, logic simulation, logic synthesis. Study of the U.S. must have help.
    2023-05-11 10:40:03下载
    积分:1
  • 使用Virtex-5 FPGA高级加密标准算法的高效实现
    应用背景在本文中,一个高性能和高度优化Rijndael AES算法的硬件实现了设计并实现Xilinx Virtex-5 xc5vlx50FPGA器件。设计采用模块化利用VHDL语言的方法。设计工作正确如图所示。这个所提出的设计的性能进行评估的基础上吞吐量和面积。我们的设计利用了速度339.087兆赫,这意味着吞吐量4.34用399片Virtex-5 FPGA面积Gbps。关键技术本文提出了一种有效的Rijndael算法的硬件实现高级加密标准(AES)加密算法采用最先进的现场可编程门阵列(FPGA)。在非常高速集成电路设计的设计硬件描述语言(VHDL)。时序仿真进行验证所设计的电路的功能。性能评估也做了吞吐量和区域。在国家的最先进的Xilinx Virtex-5实现设计(xc5vlx50ffg676-3)FPGA实现吞吐量4.34千兆位/秒,总共使用了399片。
    2022-02-20 11:10:20下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载