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可综合的Verilog语法和语义,从大学教师cambri…
《可综合的Verilog语法》国外著名大学老师编写,对于理解verilog HDL文件的可综合与不可综合会有帮助。-synthesizable Verilog syntax and semantics,by teachers from university of Cambridge,It is userful for verilog HDL design.
- 2022-03-31 07:34:29下载
- 积分:1
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VHDL_biss
FPGA中针对Biss通讯协议解码VHDL语言源码(FPGA communication protocols against BiSS source decoder VHDL language)
- 2021-03-15 19:19:22下载
- 积分:1
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VGA_DE2_6V
VGA显示彩条DE2_70开发板 验证过的(VGA display color bar DE2_70 development board validated)
- 2014-01-07 15:52:09下载
- 积分:1
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vhdl-cordic-atan-master
Implementation of CORDIC atan block in VHDL
- 2019-05-14 16:51:26下载
- 积分:1
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液晶的控制,有VHDL语言实现
液晶的控制,有VHDL语言实现-lcd control
- 2022-03-23 07:01:23下载
- 积分:1
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HARRIS 角点检测算法
HARIS角点检测Harris角点检测HARRIS CORENR探测器
- 2023-01-31 13:30:04下载
- 积分:1
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include UART port of VERILOG source, the program tested in FPGA, as chip design,...
包含UART口的VERILOG源程序,该程序在FPGA上验证通过,可作为芯片设计,或FPGA设计的一个完整IP核,硬件设计的兄弟们可参考一下。-include UART port of VERILOG source, the program tested in FPGA, as chip design, or FPGA design of a complete IP cores, hardware design brothers can make reference.
- 2022-06-01 13:44:15下载
- 积分:1
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对实例的Nios II开发的源代码,主要基于NIO…
本源码为Nios II的开发示例,主要演示基于Nios II的uCOS的移植。开发环境QuartusII。
本示例十分经典,对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of examples, mainly based on the Nios II shows the uCOS transplant. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
- 2022-07-16 15:35:51下载
- 积分:1
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FDPIM_Encode
关于语音通信信道调制的程序代码,是论文的仿真程序(About voice communication channel modulation code, the authors of the paper simulation program)
- 2013-12-11 09:27:39下载
- 积分:1
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fpga1
说明: 基于EasyFPGA030的直流电机控制电路设计和四位数字密码锁。(DC Motor Control Based on EasyFPGA030 circuit design and four-digit combination lock.)
- 2010-05-03 20:20:42下载
- 积分:1