PCI arbitor VHDL

Quartus环境下多路选择器的编写代码，适合初学数字逻辑设计的进行学习(MUX in Quartus)

本实验主要是在FPGA上实现FIR数字滤波器的功能，不仅有工程文件，还具有论文资料。(This experiment mainly realizes the function of FIR digital filter on FPGA, not only has the engineering document, but also has the thesis information.)

hdmi 视频编解码输入输出模块，verilog实现(hdmi encoder and decoder in verilog.)

异步FIFO控制器的Verilog设计与实现-Asynchronous FIFO controller Verilog Design and Implementation

LDPC的编码模块和解码模块，实现802-3an协议的编码(The module of LDPC to implement the coding of the 802-3an protocol)

红色飓风II开发板USB2FPGA USB驱动程序，由verilog编写，包括源码和FIFO测试程序(Red Hurricane II development board USB2FPGA USB driver from verilog preparation, including source code and test procedures FIFO)

qpsk调制解调，结果可以通过示波器进行观察(qpsk modulation and demodulation, the results can be observed by an oscilloscope)

decoder 2-4 digital core

此vhdl程序实现了在FPGA上构建UART通信串口。分为两部分，UART的发送端transfer和接收端receiver。需要外部根据需求提供波特率时钟。(This program implements the building vhdl UART serial interface on the FPGA. Divided into two parts, UART transfer sender and receiver receiver. Required to provide the baud clock external demand.)

流水线乘法器与加法器 开发环境：Modelsim（verilog hdl）(Multiplier and adder pipeline development environment: Modelsim (verilog hdl))