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TCON
用verilog编程的TCON模块(时序控制器)的程序(Verilog programming module with TCON (timing controller) program)
- 2013-06-26 10:50:59下载
- 积分:1
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complete with verilog language development USB2.0 IP source code, including docu...
完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档、仿真文件-complete with verilog language development USB2.0 IP source code, including documentation, Simulation documents
- 2022-08-22 09:20:17下载
- 积分:1
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ozgul2013
说明: Digital pre-distortion (DPD) is an advanced digital
signal-processing technique that mitigates the effects of power
amplifier (PA) nonlinearity in wireless transmitters. DPD plays
a key role in providing efficient radio digital front-end (DFE)
solutions for 3G/4G basestations and beyond. Modern FPGAs
are a promising target platform for the implementation of flexible
wireless DFE solutions, including DPD.
- 2019-01-05 18:20:30下载
- 积分:1
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Foundry-Flash-Verilog-code
几大代工厂的flash verilog源代码(flash verilog code)
- 2021-03-09 15:29:28下载
- 积分:1
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dac
简易函数发生器,能产生正弦波,三角波,梯形波,方波,并且可调频率和幅度值。(Simple function generator can produce sine, triangle wave, trapezoidal wave, square wave, and the adjustable frequency and amplitude values.)
- 2011-08-28 14:11:37下载
- 积分:1
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设计一个可以小时、分钟、12小时或24小时和秒的时间…
设计一个能进行时、分、秒计时的十二小时制或二十四小时制的数字钟,并具有定时与闹钟功能,能在设定的时间发出闹铃音,能非常方便地对小时、分钟和秒进行手动调节以校准时间,每逢整点,产生报时音报时。
实验平台:
1. 一台PC机;
2. MAX+PLUSII10.1。
Verilog HDL语言实现,还有完整的实验报告-The design of a can be hours, minutes, seconds time of 12 hours or 24 hours system, digital clock, and has from time to time with the alarm clock function, can be set to issue a sound alarm can be very convenient to hours, minutes and seconds for manual adjustment to calibrate the time, whenever there is the whole point, resulting in timekeeping timekeeping tone. Experimental platform: 1. A PC machine 2. MAX+ PLUSII10.1. Verilog HDL language, as well as a complete experimental report
- 2022-07-22 15:10:59下载
- 积分:1
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FPGA设计全流程-软件综合使用、
FPGA设计全流程-软件综合使用、 -FPGA design of the whole process- the integrated use of software, FPGA design of the whole process- the integrated use of software,
- 2022-12-25 07:35:03下载
- 积分:1
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filter
说明: A low pass filter module based on FPGA, easy to transplant
- 2020-05-04 10:21:42下载
- 积分:1
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FPGA的仿真实例,Verilog代码编写,过程详尽,代码易懂。第四个文档...
FPGA的仿真实例,Verilog代码编写,过程详尽,代码易懂。第四个文档-FPGA simulation examples, Verilog coding, the process in detail, code easy to understand. The fourth document
- 2022-05-31 19:32:45下载
- 积分:1
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AD5791_spi
该代码为VHDL语言描述的AD579 SPI通讯程序,包括一些代码注解。(Thisis a SPI communication promgram of AD5791 designed with VHDL which compared with some discreption.)
- 2021-04-20 14:28:50下载
- 积分:1