使用FPGA透过RS232与PC的作沟通，

entity or1 is(a,b:in std_logic;y:out std_logic);architecture dataflow of or1 isbeginy

控制ADV212 压缩的源代码 使用xilinx edk开发环境(adv 212 controller, using xilinx edk)

这个是用verilog语言编写的基于FPGA的交通灯控制器，分别控制四个方向上的交通灯的通断-The verilog language is FPGA-based traffic light controller, respectively, the four direction control of traffic lights-off

build synthesizer on a de2 dev fpga board

数控分频器的输出信号频率为输入数据的函数。用传统的方法设计,其设计过程和电路都比较复杂,且设计成 果的可修改性和可移植性都较差。基于VHDL 的数控分频器设计,整个过程简单、快捷,极易修改,可移植性强。他可利用 并行预置数的加法计数器和减法计数器实现。广泛应用于电子仪器、乐器等数字电子系统中。-NC divider output signal frequency is a function of input data. Using traditional methods of design, process and circuit design are complex and can modify the design of the results are poor and portability. NC VHDL divider based on the design, the whole process simple, fast, easy to modify, strong portability. He can use preset number of parallel addition and subtraction counter counter to achieve. Widely used in electronic equipment, musical instruments and other digital electronic systems.

Quartus环境下使用Verilog编写的HDB3编解码程序，RTL和时序仿真已过(Quartus under the environment of a HDB3 protocol procedures written in Verilog, RTL and timing simulation has be passed)

用verilog语言编写的步进电机加减速控制算法，可选择梯形曲线或S型曲线算法(Verilog language stepper motor acceleration and deceleration control algorithm, you can choose the trapezoidal curve or S-curve algorithm)

VHDL数字系统设计和工程实践6，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, six, including the principles, truth table and schematic, as well as VHDL source code.

文件中包含BFSK、DPSK、BPSK、QPSK等等数字调制程序。(File contains the BFSK, DPSK, BPSK, QPSK, and so on digital modulation process.)

eda技术与vhdl课件,很经典的学习课件-VHDL EDA technology and courseware, it is a classic learning courseware