实现了lcd1602显示的功能，可以在lcd上显示“年”字，有利于初学者学习lcd在fpga上显示，采用文本编辑的，利用quartus ii 702...

串行加法器的vhdl描述，用两个移位寄存器和一个全加器，一个d触发器实现(The VHDL description of the serial adder, with two shift registers and a full adder, a D trigger)

计算机组成原理的课程设计作业，用vhdl语言写了一个简易的cpu，包括寄存器，存储器等原件，完全用代码写成，没有直接用原件去连接，有助于我们很好的学习vhdl。   这是一个cpu的连接代码，并没有各种原件的代码 ，因为各个原件代码很简单就没上传

HART 官方资料-HART协议采用基于Bell202标准的FSK频移键控信号，在低频的4-20mA模拟信号上叠加幅度为0.5mA的音频数字信号进行双向数字通讯，数据传输率为1.2kbps。(Official information-HART HART protocol based Bell202 standard frequency shift keying FSK signal at low frequencies 4-20mA analog signal amplitude is 0.5mA superimposed on the two-way audio digital signal digital communication, data transfer rate of 1.2kbps.)

GPS信号结构,C/A码产生方式及其测距码研究(GPS signal structure and ranging code research)

In computer storage, multipath I/O is a fault-tolerance and performance enhancement technique whereby there is more than one physical path between the CPU in a computer system and its mass storage devices through the buses, controllers, switches, and bridge devices connecting them

说明：  学习vhdl硬件描述语言的一些例子的原代码(VHDL hardware description language to learn some examples of the original code)

使用DDR3IP核进行仿真，写入读取数据(Using DDR3IP core to simulate, write and read data)

交通灯控制器的VHDL设计,能控制十字路口的红绿灯转换,通过目标芯片EPF10KLC84-4验证-Traffic lights controller VHDL design, can be controlled by traffic lights at the crossroads of the conversion, through the target chips EPF10KLC84-4 verification

fpga串口的发送程序基于verilog语言拿走不用谢。(The sending program of FPGA serial port is based on Verilog language.)

黑金动力原创nios ii教程，介绍了硬件、软件开发流程，提供了led、中断、串口、rtc、spi、iic、定时器等十多个实验的详细介绍(Alinx original nios ii tutorial, this paper introduces the hardware and software development process, and provides led, interrupt, a serial port, the RTC, spi, iic, timer and so on more than a dozen experiments in detail)