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DS1302
基于DS1302芯片的VERILOG 语言数字钟。可实现年月日时分秒显示。(DS1302 chip-based language VERILOG digital clock. Date can be achieved when every minute display.)
- 2014-06-26 15:53:06下载
- 积分:1
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SDH接收处理
模拟SDH帧结构,设计了状态机,能从连续传输的SDH字节流中找出帧头;从SDH字节流中,提取E2字节,并按照64K速率分别串行输出E2码流及时钟;设计了输入信号,输出包括E2串行数据、E2串行时钟和SDH帧头位置指示
- 2023-07-26 18:40:02下载
- 积分:1
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spi_slave
FPGA实现SPI接口的从机功能,接收和发送全双工运行,接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)
- 2021-01-07 19:28:52下载
- 积分:1
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VHDL实现了IIS接口程序,在Quartus II 6.0上编译通过,在板子上可以读取IIS数据...
VHDL实现了IIS接口程序,在Quartus II 6.0上编译通过,在板子上可以读取IIS数据-IIS VHDL interface procedures, the Quartus II 6.0 compiled by the board can read data IIS
- 2022-01-26 02:43:55下载
- 积分:1
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2通道ADC Ads527x的采集实现Vhdl
2通道模数转换器的采集实现。包含VIRTEX-II
和SPARTAN-III
两种类型的FPGA元件,模数转换器件为ADS527X系列,含仿真代码。采用VHDL语音实现,具有参考价值。
- 2022-01-20 23:16:05下载
- 积分:1
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一个小程序,弹跳消除电路,可消除按健的毛刺干扰
一个小程序,弹跳消除电路,可消除按健的毛刺干扰-a small procedure, bouncing elimination circuit, according to remove the burr-interference
- 2022-05-14 03:36:36下载
- 积分:1
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CPLD_PWM
一个在CPLD,EPM70128上实现的PWM控制源程序。(A CPLD, EPM70128 realize the PWM control on the source.)
- 2008-07-25 12:43:39下载
- 积分:1
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library
Library OLED SSD1305
- 2012-11-01 21:21:26下载
- 积分:1
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Interleaver_Deinterleaver
通信中卷积交织/解交织FPGA源程序,采用verilogHDL代码实现,包含测试程序,经过验证。(Communication in the convolutional interleaving/de interleaving FPGA source program, using verilogHDL code to achieve, including test procedures, after verification.)
- 2021-04-17 15:18:53下载
- 积分:1
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cordic-algorithm
codic algorithm,which is used to calculate triangular functions
- 2014-12-25 16:44:36下载
- 积分:1