基本的usb驱动程序的编程方法,值得一看.

数控机床 多轴插补原理积分算法，实现s曲线加减速原理(Numerical control machine tool multi axis interpolation principle, integration algorithm, to achieve the S curve acceleration and deceleration principle)

串口收发，实现可调波特率的串口通信，verilog源码(Serial port and transceiver)

Fast Fourier Transform (FFT) 32K Point Design contains information about the design example

FPGA来实现数据采集，AD采用TI公司的THS1206，高速并行AD，内含16字FIFO，降低硬件复杂度。(FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.)

用Verilog语言实现汉明编码，很粗燥，是大三的时候做的(With the Verilog language Hamming code, it is rough dry, a junior at the time to do)

FSK模拟信号源，利用ISE7.1或以上环境打开。(FSK signal simulator.The project can be open in ISE7.1 or upgrade version.)

simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top

利用FPGA采集按键，加了消斗。其实跟单片机的效果差不多。-The use of FPGA collect keys, plus the elimination fighting. In fact, almost with the effect of SCM.

1. 一位全加器设计 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY add IS PORT(a,b,cin:IN STD_LOGIC; Co,S:OUT STD_LOGIC); END ENTITY add; ARCHITECTURE fc1 OF add is BEGIN S

Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double precision multiplier is implemented on a Virtex 6 FPGA. In addition, the proposed design is compliant with IEEE 754 format and handles over flow, under flow, rounding and various exception conditions. The design achieved the operating frequency of 414.714 MHz with an area of 648 slices.