I2C控制核设计,由VHDL语言编写,使普通I/O端口实现I2C性能

异步FIFO的设计 包括testbench 已调试成功-Asynchronous FIFO design includes testbench debug success has been

用Verilog实现的脉冲宽度调制程序，在quartus平台上测试成功。(Using Verilog implementation of pulse width modulation, in quartus platform test successfully.)

吠陀复用代码执行乘法的4位和8位使用进位选择加法器

用VHDL语言编写的LED显示器驱动电路的设计源程序-using VHDL prepared by the LED display driver circuit design source

上海外滩看到的最大的LED显示屏的内核源代码，主要是完成视频信号的远距离传输的编解码与接口转换-Shanghai Bund to see the largest LED display in the kernel source code, mainly to complete the long-distance video signal transmission codec conversion and interface

vga显示代码,里面有ise工程文件,是直接调过去的,大家下载下来吧-vga display code, which has ise project file is transferred directly past, everyone download it

说明：  misp，五级流水源码，实现一个建议的cpu(Misp, five-stage flow source code, implementation of a recommended CPU)

高速计算机旋转坐标算法的硬件实现，用于快速傅里叶算法的核心单元-Rotating coordinates high-speed computer hardware algorithm for fast Fourier algorithm is the core unit

Xilinx ISE 8.2i的license-Xilinx ISE 8.2i s license

篮球24s计时器，元器件简单，功能复杂。满足小型计时需要。