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ALU用VHDL项目
ALU using VHDL project
- 2022-03-22 23:35:27下载
- 积分:1
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扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现
扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现-Frequency-hopping communication QUARTUS7.0 expanded development environment in the VHDL source code and the achievement of the overall block diagram
- 2023-08-17 13:20:04下载
- 积分:1
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fpga
FPGA代码,包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择
(FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection)
- 2015-11-18 10:47:22下载
- 积分:1
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方形伺服电机 vhdl
PROGRAMM有助于使40厘米见方与FPGA机器人改变board.The运动遵循顺时针旋转。此外,惯性中心的旋转过程中保持不动。
- 2022-02-14 00:56:00下载
- 积分:1
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cyclone and cyclone2 system used in the use 5v, making FPGA chip compatible with...
cyclone和cyclone2用在5v系统里使用方法,使得FPGA芯片在5V系统中兼容-cyclone and cyclone2 system used in the use 5v, making FPGA chip compatible with the 5V system
- 2022-02-03 17:24:31下载
- 积分:1
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IIR-digital-filter-
采用双线性变换法设计IIR数字滤波器设计的c代码,包括低通、高通和带通(Document recording the design of IIR digital filter c code)
- 2011-09-05 17:47:58下载
- 积分:1
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UART异步串行通信协议的源代码,采用VHDL语言…
uart异步串口通信协议的源代码,用vhdl语言编写,并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
- 2022-03-20 22:18:17下载
- 积分:1
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freq_meter
使用verilog写的频率计,可切换档位(Frequency counter using verilog write switch stalls)
- 2012-12-08 00:54:56下载
- 积分:1
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出租车记价器,使用vhdl语言编写的源码及其仿真。
出租车记价器,使用vhdl语言编写的源码及其仿真。-Taxi price of devices in mind, use the source code written in vhdl and simulation.
- 2022-03-06 03:11:59下载
- 积分:1
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Manip_NIOS_1
nios processor example 1
- 2015-05-22 00:17:43下载
- 积分:1