基于FPGA的17阶FIR滤波器VHDL代码及说明文档

Implementation of Image Processing Algorithms in FPGA Hardware.

该源码表述了ecc算法如何用vhdl实现RSA（Ron Rivest，Adi Shamir，Len Adleman三位天才的名字）一样，ECC（Elliptic Curves Cryptography，椭圆曲线密码编码学）也属于公开密钥算

用VIVADO软件编写的，实现以太网芯片88E1510中的mdio控制模块代码，并且含有VIO仿真文件(Written in VIVADO software, the realization of the Ethernet chip 88 e1510 mdio control module of code, and contains the VIO simulation file)

VHDL学习总结，简要概括了VHDL，非常适合做学习的总结-VHDL study conclusion, a brief summary of VHDL, very suitable for learning to do a summary of

在nios系统开发中的驱动i2c音频电路的代码,包括verilog代码,与相应的驱动代码(In the nios system development in the driver i2c code for the audio circuitry, including the verilog code, and the corresponding driver code)

BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)

用FPGA实现IIC通讯的主控端，最简化的代码，占用最小FPGA资源-Use FPGA to come ture the main control of the iic comunication, the most simple code and using the least FPGA resource

VHDL实现快速傅里叶变换，内附带资料以及源代码。(VHDL fast Fourier transform, within the supplied data and source code.)

从FPGA输出到HDMI Tx的verilog 模块。实现完整HDMI图像输出功能。(FPGA output to HDMI Tx module in verilog)

Synchronous Resets? Asynchronous Resets?I am so confused!How will I ever know which to use? 复位信号的论文-Synchronous Resets Asynchronous Resets I am so confused! How will I ever know which to use Minute Signal-paper