全部通过，是我的精心设计，完全满足初学者的要求。

简要地说明时序约束的内容，对入门级的朋友相当起到引导的作用(Briefly describes the content of timing constraints on entry-level friends rather play a guiding role)

LCD显示超级玛丽游戏2 (LCD display Super Mario game)

调整iq幅度不平衡的模块，可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)

very good code for edge detection based on vhdl programming.

bch编解码的完整版，本人已经做过fpga实现，就是按照该程序为原型，绝对可运行(bch decoding the full version, I have done fpga implementation is in accordance with the procedure for the prototype, can certainly run)

说明：  实现对LCD1602的Verilog HDL编程(the program for LCD1602 based on Verilog HDL)

说明：  VHDL BASED DATA COMPRESSION

数字波形存储器VHDL源码，基于Quartus II开发。-Digital waveform memory VHDL source code, based on the Quartus II development.

FGAP控制模拟量输出芯片DAC8812(FGAP control analog output chip DAC8812)

VHDL的初学者可以参考此VHDL加法器，相信会给你带来不小的收获-VHDL beginner can refer to the VHDL adder, I believe will bring you not a small harvest