利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！...

GPIO LED 测试工具源代码，可以用来检测开发的主板GPIO LED设备是否工作正常(GPIO LED test tool source code, can be used to detect the development of motherboard GPIO LED device is working properly)

Simulation and Synthesis Techniques for Asynchronous FIFO Design

说明：  LIUSHUIDENG VHDLYUYAN XIADE SHUIDENG(LEDWATER I WRITER IT MYSILF.IT'S EASY ! YOU CAN WRITER IT,TOO)

Aurora协议是一款高带宽、低成本、可扩展、框架简洁、适合点对点串行数据传输的协议。(Aurora protocol is a high-bandwidth, low-cost, scalable, simple framework for point to point serial data transfer protocol.)

VHDL Design of BCD to 7-segment decoder using PROM

VHDL tutorial for self studying

Arty Z7 20 HDMI output

verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器(verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter)

说明：  verilog语言编写的简单FPGA 的从机模式 spi 通讯(Slave mode SPI communication of FPGA)

FPGA Verilog HDL模拟IIC通讯接口-FPGA Verilog HDL IIC Interface