占空比1：1的通用分频模块

实现的电子钟，资料非常全面，是一次课程设计的大作业，完成的质量很高。(Achieve the electronic clock information is very comprehensive, curriculum design job, completed high quality.)

本科毕业设计，简易逻辑分析仪，重点在于用CPLD搭建显卡，输出VGA信号驱动显示器显示逻辑波形(A design for LA,use cpld to generate VGA signals.)

由于在网上很难下载到EDA技术－窦衡的PPT，所以本人经过学习后做成word，供大家下载。只针对VHDL语言部分和所有的程序。-Because the Internet is difficult to download to EDA technology- Douheng of the PPT, so I made after learning after the word, for all to download. Only for part of the VHDL language and all the procedures.

跑马灯 简单实用很适合初学者 希望对大家有用-Marquee is simple and practical very suitable for beginners want to be useful to everyone

DE0_PWM_LED_DRİ VE_Sİ MULATİ ON

altera max10 USB demo，使用了phy，把开发板配置成U盘模式(altera max10 USB demo，using PHY device，design a U pan)

matlab file for image contrast..

Package include hardware implementation of Lz77 algorithm

扩频通信的Verilog工程，对从事无线通信的工程人员有参考作用。(Spread spectrum communication Verilog project, engaged in wireless communications engineering staff reference.)

SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1.