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disptest
模拟示波器的现实程序,有x,y和光标。采用AD5440输出,现实效果很好。(示波器x-y方式)(Analog oscilloscope reality program, there are x, y and cursor. Using AD5440 output, real good results. (Xy oscilloscope mode))
- 2013-09-13 23:18:19下载
- 积分:1
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convotion_decode
用verilog写的卷积码的编码程序以及viterbi译码程序(Use verilog write convolution code coding procedures and viterbi decoding program)
- 2012-09-06 20:24:55下载
- 积分:1
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ppm
ppm调制的verilog代码 可实现ppm调制(ppm modulation verilog code ppm modulation)
- 2012-10-23 11:29:33下载
- 积分:1
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FPGA_merge
关于FPGA排序算法的研究文献,有全排序和一些归并算法的文献介绍。(FPGA sequencing algorithm on the literature, there are some sort of sorting algorithm and the literature on the merger.)
- 2016-11-22 21:12:56下载
- 积分:1
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based-on-fpga
基于fpga的电子血压计。pdf文档,好用,内容清楚简单,转载而来(Electronic sphygmomanometer based on fpga)
- 2013-12-05 10:57:22下载
- 积分:1
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NIOS II IDE 编程, uart_txd测试程序,仅供参考。
NIOS II IDE 编程, uart_txd测试程序,仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.
- 2022-11-30 03:45:03下载
- 积分:1
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Interleaver_Deinterleaver
通信中卷积交织/解交织FPGA源程序,采用verilogHDL代码实现,包含测试程序,经过验证。(Communication in the convolutional interleaving/de interleaving FPGA source program, using verilogHDL code to achieve, including test procedures, after verification.)
- 2021-04-17 15:18:53下载
- 积分:1
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用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL...
用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
- 2022-05-14 13:34:13下载
- 积分:1
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硬件描述语言Verilog
硬件描述语言Verilog-Verilog hardware description language
- 2022-07-26 19:00:22下载
- 积分:1
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Viterberi 解码器
Viterberi 解码器使用 vhdl 编程实现将被用于制作增强功能
- 2023-03-06 21:00:04下载
- 积分:1