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FPGA应用举例,非常适合初学者,高手莫下
FPGA应用举例,非常适合初学者,高手莫下-FPGA application, for example, very suitable for beginners, experts, under Mo
- 2022-10-06 03:30:03下载
- 积分:1
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带LDN的的同步的预置数端子,并且带CLR的异步清零端
带LDN的的同步的预置数端子,并且带CLR的异步清零端-LDN synchronization with the preset number of terminals, and cleared with CLR Asynchronous client
- 2022-02-22 00:30:35下载
- 积分:1
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ces_svtb_2011.12
synopse sv培训lab,是学习systemverilog非常好的资料,放心下载。(synopsis sv training lab)
- 2021-04-19 11:18:51下载
- 积分:1
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8_BUS
说明: BUS documentation and map reffereces
- 2020-06-25 19:40:02下载
- 积分:1
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Chebyshev-filter
利用matlab设计了一个切比雪夫滤波器,并且对滤波器性能进行了仿真分析。(Using the matlab design a chebyshev filter, and has carried on the simulation analysis on filter performance.
)
- 2013-09-05 20:04:36下载
- 积分:1
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DE2 development company for the altera board SD_Card_Audio examples
用于altera公司DE2开发板上SD_Card_Audio的实例-DE2 development company for the altera board SD_Card_Audio examples
- 2022-12-25 12:55:03下载
- 积分:1
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dds
说明: 实现数字频率合成实验,加载数据ram,形成波形(The experiment of digital frequency synthesis is realized, and the data RAM is loaded to form the waveform)
- 2020-11-10 18:12:36下载
- 积分:1
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mu0
基于Xilinx Spartan6的
一个简单的CPU MU0
VHDL(Based on a simple CPU Xilinx Spartan6 of MU0 VHDL)
- 2020-12-07 08:29:22下载
- 积分:1
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通信协议FPGA
说明: 本设计是基于FPGA的高速并行接口通信接口和协议设计,该设计使用的是8
位并行接口,通过配置FPGA的FIFO寄存器保证了在高速并行下的数据稳定性,在 最终的测试中,该协议能够稳定传输的速度为80Mbps。(This design is based on FPGA high-speed parallel interface communication interface and protocol design, the design uses 8
Bit parallel interface ensures the data stability under high-speed parallel by configuring the FIFO register of FPGA. In the final test, the protocol can stably transmit at 80 Mbps.)
- 2020-12-11 11:39:19下载
- 积分:1
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zidongmen1
说明: 控制步进电机转动,正反转,旋转角度完美掌握。很好用,亲测(Control stepping motor rotation, positive and negative rotation, perfect control of rotation angle. Very easy to use, personal test)
- 2018-12-25 16:41:07下载
- 积分:1