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mdio
用VIVADO软件编写的,实现以太网芯片88E1510中的mdio控制模块代码,并且含有VIO仿真文件(Written in VIVADO software, the realization of the Ethernet chip 88 e1510 mdio control module of code, and contains the VIO simulation file)
- 2020-09-16 14:37:55下载
- 积分:1
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5_ADC_Lab
基于altera公司MAX10型FPGA的ADC调试程序(ADC-based debugger altera company MAX 10 type of FPGA)
- 2015-11-18 10:56:16下载
- 积分:1
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Temperature measurement
Using LabVIEW FPGA, Spartan3E, PMODTMP
Temperature measurement
Using LabVIEW FPGA, Spartan3E, PMODTMP
- 2022-03-05 00:22:10下载
- 积分:1
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S6_VGA
1。源文件保存在src目录,QII的工程文件保存在Proj目录;
2。程序实现的功能是在VGA显示器上显示彩色条纹,共8种颜色,
可以使用嵌入式逻辑分析仪观测信号;
3。modelsim仿真文件在proj--simulation--modelsim中(1. The source file is saved in the src directory QII project file is saved in the directory Proj 2. The functionality of the program is displayed on a VGA monitor color stripes, 8 colors, you can use the embedded logic analyzer observed signals 3. the modelsim simulation files in the proj- simulation- modelsim)
- 2012-11-04 18:26:48下载
- 积分:1
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VLSI-Paper
VLSI based question set
- 2013-04-02 18:36:26下载
- 积分:1
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yinpine2
基于NIOS2的VGA接口IP核,具有很好的借鉴性和参考性(NIOS VGA IP)
- 2012-10-12 21:14:35下载
- 积分:1
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这是一个HDB3的译码器,实现从HDB3双极性码到高低电平二值序列的转化...
这是一个HDB3的译码器,实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences
- 2022-11-02 21:30:03下载
- 积分:1
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sram 读写小程序,用verilog编写的,请各位高手指教
sram 读写小程序,用verilog编写的,请各位高手指教-SRAM read and write small programs using Verilog prepared, please enlighten you master
- 2022-07-03 11:53:36下载
- 积分:1
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adder8
8位加法器源代码,vivado实现编写。(8 adder Source, vivado achieve write.)
- 2015-12-01 20:35:55下载
- 积分:1
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16位元浮点数CPU,可作运算,以VHDL编写
16位元浮点数CPU,可作运算,以VHDL编写-16-bit floating point CPU, can be used for computing in order to prepare VHDL
- 2022-05-17 06:20:07下载
- 积分:1