HLD开发语言ADHL介绍。ADHL是ALTERA公司开发的硬件描述语言，也是一种较为流行的开发工具。是介绍AHDL的入门培训资料。...

emmc控制芯片CMD命令线主机接口模块,(emmc control chip CMD command line host interface module)

The code is used to interface PC monitor with Spartan 3E for the display. if you run the program on spartan 3 you would be able to see different test pattern on the monitor screen

Module for filtering input digital signal

DDS 产生正弦信号，OOK，AM三种波形。 使用xilinx FPGA VHDL(DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.)

RS编码是一种纠错码，本程序实现RS（255，223）用FPGA 实现RS编码，程序在Quartus II中调试通过。(RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.)

说明：  制作16位流水灯，实现LED模块对于拨杆0和1的识别(Making 16-bit pipeline lamp to realize the recognition of dial rod 0 and 1 by LED module)

入门，verilog语言，实现字符型液晶1602的显示，及按键控制-verilog

FFT with fix point 2*N

xilinx FPGA技术详解,从设计流程到设计注意点(xilinx FPGA technology Detailed Design points, from the design process to)

RGB vga driver for manipulating the colours of a given image buffer. The code has beeen written in vhdl