build a music player with nios 2

调整iq幅度不平衡的模块，可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)

这一计划表明它是如何在如此逻辑门是门NAND，什么它NAND它是结合两个闸门之一，并没有。

利用Verilog编写一个交通灯控制电路，能控制两条路上红、黄、绿灯的变化，并且显示等待时间(Using Verilog HDL to design a traffic light control circuit. It can control the change of red, yellow and green lights on two roads, and display the remaining waiting time.)

这里面有很多的vhdl的编程的源代码，文件是全英文的，例子丰富(That there are a lot of vhdl programming source code, documentation is in English, and examples of rich)

实用Verilog编写的SVPWM程序，产生出SVPWM波形，可用于实现同步电机或者异步电机的空间矢量控制算法。(Practical Verilog of SVPWM written procedures, resulting in the SVPWM waveform can be used to implement the space vector control algorithm of the synchronous motor or induction motor.)

说明：  参照can芯片 saj1000控制器结构，写的can控制器(According to the structure of can chip saj1000 controller, the CAN controller is written)

能够在EDA环境下实现四位十进制数字密码锁的设置与开锁功能，并能更改使用密码，还可以防止抖动(EDA environment to achieve four decimal code lock and unlock function of the settings and change the use of passwords, but also to prevent the jitter)

超声波测距程序 适用传感器HC-SR04(The application of sensor HC-SR04 for ultrasonic range finder)

system Verilog combinational logic

基于CPLD的签到器的设计，用三维数组队人名进行储存-Based on the attendance CPLD design, a few team names with three-dimensional storage