moore 状态机的一个简单的事例，初学者很好的地实例！

针对京微雅阁的CME300 FPGA教程，里面有几个例程，并附有源代码，初学者可尽快入门。(For Beijing micro Accord CME300 FPGA tutorial, there are a few routines, with source code, beginners can start as soon as possible.)

A 4 bit twisted ring counter is a sequential circuit which produces the following sequence of output values: 0000, 1000, 1100, 1110, 1111, 0111, 0011, 0001 and then repeats. Design a circuit for a 4 bit twisted ring counter that uses four D flip flops. Draw a state transition diagram, a state table and a schematic for your circuit. Design an alternate implementation using just three flip flops and draw a state transition diagram, state table and a schematic for your circuit. If your designs are extended to implement an n bit twisted ring counter, how many flip flops are required using each of the two approaches. In what situations would you prefer the first method? In what situations would you prefer the second?

说明：  潘松那本书上用vhdl语言描述的16位并入并处加法器(Pan book vhdl language used to describe the 16-bit adder into his)

WCDMA数字直放站中数字预失真研究及其FPGA实现(WCDMA Digital Repeater digital pre-distortion and its FPGA implementation)

用verilog语言编写的步进电机加减速控制算法，可选择梯形曲线或S型曲线算法(Verilog language stepper motor acceleration and deceleration control algorithm, you can choose the trapezoidal curve or S-curve algorithm)

浮点加法器的用Verilog实现，32位的浮点加法器(Floating point adder Verilog)

实现千兆以太网数据发送，通过GMII接口向PHY写数据，控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)

实现verilog读写txt文件，从sut.txt从读取数据，进行操作后，写入out.txt(Realize verilog read and write txt file)

固定的 128 点复杂 FFT 或 64/8/16 点

说明：  PIC32MX4系列单片机I2C总线模块示例代码 PIC32MX4系列单片机I2C总线模块示例代码PIC32MX4系列单片机I2C总线模块示例代码PIC32MX4系列单片机I2C总线模块示例代码(PIC32MX4 I2C PIC32MX4 I2C PIC32MX4 I2C PIC32MX4 I2C)