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FPGA 智能车
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
智能小车的FPGA程序,能实现小车的前进,后退,转弯,使得小车走一个正方形后停止下来,程序采用vhdl硬件描述语言。
- 2022-12-31 15:55:04下载
- 积分:1
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Hexadecimal to 7 segments
Hexadecimal to 7 segments
- 2022-03-07 14:40:55下载
- 积分:1
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halfband
verilog写的39阶通带为20KHz的半带fir滤波器,经测试正确。(verilog halfband FIR)
- 2020-12-25 14:29:04下载
- 积分:1
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emifa_ram
FPGA与DSP的EMIF通信,EMIF的RAM这方面相应的程序(FPGA and DSP EMIF communication)
- 2020-12-01 15:49:26下载
- 积分:1
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T13_USB
本示例为基于FPGA红色飓风一代IDS-EP1C6/12开发板的USB传输,实现了pc端接收来自FPGA开发板的数据,并显示条纹,具体使用说明见解压后的说明文档。(This example is based on red hurricane generation FPGA development board' s USB transfer IDS-EP1C6/12 realized pc client receives the data from the FPGA development board and display stripes, detailed instructions, see the documentation after decompression.)
- 2011-01-05 15:10:38下载
- 积分:1
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8051IP nuclear source code (VHDL). RAR
8051IP 核源代码(VHDL).RAR-8051IP nuclear source code (VHDL). RAR
- 2022-11-14 08:05:04下载
- 积分:1
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vga接口的工程实现,基于altera环境,需要的可以
vga接口的工程实现,基于altera环境,需要的可以-vga interface engineering implementation, based on altera environment, need to take a look at
- 2023-04-22 21:05:04下载
- 积分:1
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myDPll
说明: 本人写的数字锁相环,有模拟数据,学习锁相环很好的材料。参考书“数字锁相环路原理与应用”编写。(I write the digital phase-locked loop, have simulated data, a good phase-locked loop learning materials. Reference book )
- 2008-08-29 08:54:53下载
- 积分:1
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VHDL_count 从 0 到 9 4 7 段 LED 显示 4 脉冲使 (đếm 慈 0 đến 9 hiển 施耐 4 带领 7 đoạn với 4 xung 启用)
VHDL_count 从 0 到 9 4 7 段 LED 显示 4 脉冲使 (đếm 慈 0 đến 9 hiển 施耐 4 带领 7 đoạn với 4 xung 启用)
- 2022-05-29 10:17:32下载
- 积分:1
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design-of-CAN-based-on-VHDL
基于Verilog+HDL设计CAN控制器,详细介绍各功能模块的设计。本论文的重点是CAN总线通信控制器的前端设计。即用Verilog HDL语言完成CAN协议的数据链路层的RTL级设计,实现其功能,并且能够在FPGA开发平台Quartos上通过仿真验证,证明其正确性(Verilog+ HDL-based design of CAN controller, detailed design of each functional module. This paper focuses on the CAN bus communication controller front-end design. Verilog HDL language that is used to complete the data link layer CAN protocol the RTL-level design, to achieve its function, and can be on the FPGA development platform Quartos by simulation to prove its correctness)
- 2011-07-22 15:22:27下载
- 积分:1