this come from alter ,you can look and find it on line.

usb读取，仅供参考，在实际应用中要更改以下数据。(Read usb data)

QFSK的调制与解调，用C写的主程序，汇编写的调制与解调的子程序(QFSK the modulation and demodulation, with the main program in C, compile writing, the modulation and demodulation of the Subprogram)

SMBus控制器的VHDL源码程序，适用于Quartus2，ISE等开发环境。(The SMBus controller VHDL source code procedures applicable to Quartus2 ISE development environment.)

8位相 加乘法器，具有高速，占用资源较少的优点-eight multiplier phase together with high-speed, taking up less resources advantages

说明：  Verilog code for implementing simple ALU.

同步FIFO功能，verilog语言描述，通过了modelsim 6.0 仿真，Quartue综合-Synchronous FIFO function, verilog language described by the modelsim 6.0 simulation, Quartue integrated

Matlab - to hdl code for square root

介绍如何使用 FPGA 内部的 ROM 以及程序对该 ROM 的数据读操作。(This paper introduces how to use the ROM inside the FPGA and how to read the data of the ROM by the program.)

Vga in vhdl using spartan 3e board basys

数字钟，简单的数电应用，电子表源程序，常用也使用-watch