VHDL编写的数字钟，在Q

用于FPGA的反量化算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。-FPGA used to quantify anti-HDL coding algorithms, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.

用fpga实现SDI（ xapp1014-xilinx-sdi）赛灵思原厂资料(Using fpga implementation SDI (xapp1014-xilinx-sdi) Xilinx original data)

模块化分散聚集 DMA 是连续或非连续的转移。如正常 DMA 或散点图聚集 DMA 配置的输入或输出的部分。

This is a divider, which is depicted as well. It is a programming language Vhdl.

说明：  千年服务端修改工具，千年db数据在线修改(Millennium server modification tool Millennium server modification tool)

1024点快速傅里叶变换，使用verilog hdl硬件描述语言(1024point FFT，using verilog hdl)

3-8译码器地简单实现，采用QUARTUSii5.0环境编译-3-8 decoder to realize a simple, using the compiler QUARTUSii5.0 environment

HDB3码在matlab中的仿真，包括原始码、AMI码及HDB码的相关仿真图形(HDB simulink in matlab)

使用FPGA做的数码相册实验，用NIOS做了FAT32文件系统和JPEG图像解码,FPGA和SDRAM做了显示的缓存(Using FPGA to do the digital album experiment, using NIOS to do the FAT32 file system and JPEG image decoding, FPGA and SDRAM to do the display cache)

ldpc编解码程序。有testbentch。-ldpc encoding and decoding process. There testbentch.