基于FPGA的VHDL可以产生不同的音调,象音乐一样

Generating a wider ALU from two small ones

用verilog编写的包含有与DSP通信，三电平svpwm实现的程序，(Written in verilog contains communicate with the DSP, three-level svpwm realize the procedures)

数字电路点阵赛车，分为开始前5秒倒计时，59秒计时，赛车显示，赛道显示，失败提示，成功提示，移动控制以及总控制等8个模块。实现由3个开关控制点阵赛车在设置好的赛道中前进或左右移动。

该程序实现最小频移键控信号的调制解调，经测试无误。(The program implements minimum shift keying signal modulation and demodulation, tested and correct.)

verilog HDL 4×4矩阵键盘驱动程序包括硬件电路图-verilog

适用于FPGA的SOPC方面的元器件添加，如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT

FSK编码器和译码器,有需要的朋友可以看看！(FSK encoder and decoder, there is a need friends can see!)

verilog i2c master rtl+testbench 转自特权同学(verilog i2c master rtl+testbench)

ad9230的配置程序，差分输入输出，verilog(ad9230 configuration program, verilog)

SED1330/1335/1336/E1330液晶显示控制器及51汇编源程序.液晶显示程序,显示图形及汉字.-SED1330/1335/1336/E1330 LCD controller and the source of 51 Series procedures. LCD procedures, and show pictures of Chinese characters.