一个有效的高吞吐量的FPGA的AES实现多千兆位协议

Image Embedded VHDL Code by using watermarking technique

de2开发板上的一个小程序 模60的计数器/分频器(de2 board developed a small program module 60 of the counter/divider)

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实现任意倍数的倍频,帮助大家解决VHDL倍频问题,(The realization of arbitrary multiples of the octave, octave VHDL help people solve problems,)

8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.

io 组件，用vhdl实现io端口的控制，包括输入输出，握手信号，-io port VHDL code

vhdl学习方法,含有大量的vhdl源代码,对vhdl的语法的介绍-VHDL source习laugh Yang, Yi bleed at the nose cavity submerged stresses measured tungsten Daitou VHDL, VHDL-Qin Pang Yang cavity cavity Geng Zhuang

说明：  一个具备bp协议典型功能的数据传输系统（超时重传机制以及托管传输）包含五个节点(A data transmission system with typical functions of BP protocol (Overtime retransmission mechanism and managed transmission) consists of five nodes)

在FPGA上编写的通过SPI总线配置外部DAC芯片DAC5686的程序，通过板级调试，验证可用。程序通过状态机实现，将需要配置的寄存器值转为SPI总线的数据格式发送出去。 (Configure external DAC chip DAC5686 via SPI bus program on FPGA written by board-level debugging, verification is available. Program through the state machine, you will need to configure the register values 椠渀琀漀 SPI bus data format sent.)

基于FPGA的新型数据位同步时钟提取(CDR)实现方法-New FPGA-based data bit sync clock extraction (CDR) method