基于单片机与CPLD的 等精度频率计，VHDL语言

FPGA Verilog HDL模拟IIC通讯接口-FPGA Verilog HDL IIC Interface

说明：  使用Verilog，以Quartus II 为平台，编写了一个DDS信号发生器程序。(Using Verilog and Quartus II as the platform, realizing the DDS signal generator program .)

VHDL编写的4个led灯循环明暗变化，通过改变波形占空比实现，课堂作业自编程序-VHDL prepared by the four led lights cycle shading changes, by changing the waveform duty cycle to achieve, self-compiled class operating procedures

这是使用VHDL编写的交通灯程序,供大家交流学习-This is the use of VHDL prepared by the traffic lights procedures for the exchange of learning

control stepper motor by fpga card with vhdl program

关于MPEG压缩的程序，里面有较多的源代码和完整的说明是用MICROBLAZE完成的。(On the MPEG compression process, there are more source code and complete description is completed with MicroBlaze.)

8051core-Verilog FPGA的51单片机内核源代码! -8051core-Verilog FPGA 51 Singlechip kernel source code!

基本交通系统,实现城市交通路口的模拟仿真，自己的课程设计作品(Basic transport system, urban traffic junction simulation, design their own courses)

全加器结构描述是从设计实体的内部结构对结构体进行描述的，并给出该实体所包含的模块或元件的相互连接关系-fulladd

8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.