交通管理与控制系统

直接数字频率合成，可以直接输出所需要的波形-Direct digital synthesizer, you can direct output of the waveform required

主要讲述了数码相机MIPI接口协议说明，工作模式及信号传输原理等(Camera Interface Overview)

计算三平动并联机构工作空间，自己编的，测试可以用(Calculation of three translation parallel mechanism)

一路24位计数器,cpu可直接读写计数器的计数值.-All the way 24-bit counters, cpu can be directly read and write the total value counters.

反应速度测试小游戏，最小外设cpld游戏，带设计说明书(Reaction speed test games, the minimum peripheral cpld game, with design specifications)

DDS的VHDL程序，相当好，值得下载，共享才是王道(DDS, VHDL program is quite good, worth downloading, sharing is king)

This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.

Xilinx开发板ML505的DDRII示例程序，使用Verilog，调用MIG，编译环境ISE11.1(Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1)

FSK模拟信号源，利用ISE7.1或以上环境打开。(FSK signal simulator.The project can be open in ISE7.1 or upgrade version.)

嵌入式的LCD的图片显示程序，是LCD最好的资料。(Embedded LCD picture display program is the best LCD data.)