交通管理与控制系统

说明：  Verilog AXI Components Readme GitHub repository: alexforencich verilog-axi

this ebook for electronics hobbiest. VHDL for Beginners

verilog full case and paralel case directive usage

简单电子玩具的感知模块程序设计,通过外部输入信号改变内部信号.从而改变玩具的状态-simple electronic toys perception module programming, through external input signal a change in the internal signal. In order to change the state of toys

本代码实现了全加器的功能，可供初学者学习-This code implements a full adder functions, for beginners to learn

Design HDL code for a circuit that calculates the Hamming distance of two 8-bit inputs.

说明：  SDIO 接口，实现SD卡的控制器功能，带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)

Fpga开发应用，jtag方面的源代码，VHDL-Fpga development and application, jtag in the source code, VHDL

XAPP585 serdes_1_to_7 and serdes_7_to_1 data

ASIC design and synthesis