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xiangmu_chengxu
雷达基本恒虚警处理，CA-CFAR(单元平均恒虚警处理),OS-CFAR（有序类恒虚警处理）,SO-CFAR（选小类恒虚警处理），(radar basic constant alarm operation,obtaining os-cfar,so-cfar,os-cfar,ca-cfar)
- 2020-12-01 20:59:28下载
- 积分：1
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1
说明： 一个解决除法溢出的例子，可以学习到很多，注释很详细(A solution to the division overflow example, you can learn a lot, very detailed notes)
- 2013-12-24 09:19:13下载
- 积分：1
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Verilog版的C51核(DW8051)
Verilog版的C51核(DW8051)-Verilog version of the C51 core (DW8051)
- 2022-02-27 07:41:54下载
- 积分：1
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NAND型闪存接口程序 NANDflash
NAND型闪存接口程序 里面包含了datasheet以及测试程序 (NAND flash memory interface program)
- 2020-06-26 00:00:02下载
- 积分：1
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read-string-from-FLASH
read data of type character from flash memory
- 2013-09-08 03:49:15下载
- 积分：1
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4. If a modified source code is distributed, the original unmodified
4. If a modified source code is distributed, the original unmodified -- source code must also be included (or a link to the Free IP web -- site). In the modified source code there must be clear -- identification of the modified version.-4. If a modified source code is distributed, the original unmodified-- source code must also be included (or a link to the Free IP web-- site). In the modified source code there must be clear-- identification of the modified version.
- 2022-01-21 00:25:44下载
- 积分：1
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f_adder
一位加法全加器，可以实现低位进位输入和高位进位输出。(full adder)
- 2009-12-24 15:40:39下载
- 积分：1
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MAX2 EPLD 的测试程序, VHDL语言编写.
MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.
- 2022-01-26 06:18:20下载
- 积分：1
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square_syn
说明： 平方环载波同步法FPGA实现的verilog代码(square loop carrier wave syn)
- 2021-03-04 23:59:32下载
- 积分：1
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ps2接口的工程实现，顶层为原理图，便于理解
ps2接口的工程实现，顶层为原理图，便于理解-ps2 interface engineering implementation, the top-level schematic diagram for easy understanding of
- 2022-07-10 06:48:35下载
- 积分：1
