步进电机

关于LDPC解码的verilog程序，包含设计代码和验证环境(LDPC decoding on verilog procedures, including the design code and verification environment)

HDL example source code 3/5 jkff_a

VHDL与Verilog的比较-VHDL and Verilog comparison

基于FPGA的Verilog语言实现的六十进制计数器(FPGA-based Verilog language implementation of six decimal counter)

Thomas课本中的verilog例子。Thomas的verilog在可编程期间领域很有名-Thomas textbook example of verilog. Verilog Thomas in the field during the famous programmable

4. If a modified source code is distributed, the original unmodified -- source code must also be included (or a link to the Free IP web -- site). In the modified source code there must be clear -- identification of the modified version.-4. If a modified source code is distributed, the original unmodified-- source code must also be included (or a link to the Free IP web-- site). In the modified source code there must be clear-- identification of the modified version.

VHDL教程及源码,是新手入门的不二选择!-VHDL Tutorial and source code is the only option, beginners!

多功能波形发生器VHDL程序与仿真 URAT VHDL程序与仿真 ASK调制与解调VHDL程序及仿真 LCD控制VHDL程序与仿真-Multi-function waveform generator and simulation of VHDL procedures URAT VHDL simulation procedures and ASK modulation and demodulation procedures and VHDL simulation program LCD control and simulation of VHDL

VHDL参考手册，从事FPGA的好帮手，FPGA学院的终身伴侣！-VHDL Reference Manual, in FPGA a good helper, FPGA college life companion!

6级流水，verilog实现浮点数的加法，其中浮点数格式符合IEEE754标准-6 water, verilog realize the floating point adder, in which floating-point format in line with the IEEE754 standard