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BaseLine1
this is an peak detection alguritm,in this matlab code u can clean base line noise to have clear ECG signal
- 2012-12-12 00:58:21下载
- 积分:1
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8051IP nuclear source code (VHDL). RAR
8051IP 核源代码(VHDL).RAR-8051IP nuclear source code (VHDL). RAR
- 2022-11-14 08:05:04下载
- 积分:1
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inv_matrix
矩阵求逆模块硬件实现,用verilog语言,基于ISE开发环境(implement of inverse matrix)
- 2021-03-24 10:19:14下载
- 积分:1
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suijitu
matlab随即图设计程序,应该比较有用,希望能申请会员成功吧。。(matlab then drawing design program)
- 2013-04-25 10:49:07下载
- 积分:1
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微波炉定时器集成电路的设计 1、 控制状态机:工作状态状态转换。
2、 数据装入电路:根据控制信号选择定时时间、测试数据或完成信号的装入。
3、...
微波炉定时器集成电路的设计 1、 控制状态机:工作状态状态转换。
2、 数据装入电路:根据控制信号选择定时时间、测试数据或完成信号的装入。
3、 定时器电路:负责完成烹调过程中的时间递减计数和数据译码供给七段数码显示,同时还可以提供烹调完成时间的状态信号供控制状态机产生完成信号。
-microwave timer IC design a control state machine : state of the state conversion work. 2, data loading circuit : According to choose control signal timing, or the completion of the test data signal load. 3, timer circuit : responsible for the completion of the cooking process of counting and time decreasing supply data decoding digital paragraph 107, while cooking can also provide time to complete state control signal for the state machine generated signals.
- 2022-04-02 09:49:26下载
- 积分:1
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LMS
verilog实现的LMS的算法,另外有tb文件可以测试已测试代码正确……(verilog implementation of LMS algorithm, another tb files can test the code has been tested properly ......)
- 2021-03-12 15:29:25下载
- 积分:1
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用VHDL实现一个四位十进制计数器来进行计数,并且仿真通过
用VHDL实现一个四位十进制计数器来进行计数,并且仿真通过-To use VHDL to achieve a 4 decimal counter to count, and the simulation through the
- 2022-06-18 07:56:39下载
- 积分:1
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To increase simulation speed, ModelSim® can apply a variety of optimizations...
To increase simulation speed, ModelSim® can apply a variety of optimizations to your design. These include, but are not limited to, mergingprocesses, pulling constants out of loops, clock suppression, and signal collapsing. You control the level of optimization by specifying certain switches when you invoke the compiler.
- 2022-03-06 09:05:21下载
- 积分:1
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A4_Oscilloscope_Top
数字示波器实验,利用AD、DA和VGA三个外设来实现简易示波器,DA外设发送正弦波给AD外设,AD外设解析成数字信号将数据送给VGA外设进行显示。在VGA上可以看到DA外设发送的波形、波形频率和波形峰峰值。(In the experiment of digital oscilloscope, AD, DA and VGA are used to realize simple oscilloscope. DA peripheral transmits sine wave to AD peripheral. AD peripheral resolves into digital signal and sends data to VGA peripheral for display. The waveform, waveform frequency and peak value of DA peripheral can be seen on VGA.)
- 2019-03-13 10:45:10下载
- 积分:1
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zhentongbu_VerilogHDL
帧同步的VHDL程序源代码,巴克码同步实现。(Frame synchronization of the VHDL source code, Barker code synchronization)
- 2012-05-26 19:35:40下载
- 积分:1