vhdl,序列信号检测模块，此模块检测1110010，可改为任意序列，输出电位为1为检测出，否则为0...

一个实用的uart协议模块，使用verilog 实现(A practical uart protocol modules, use verilog to achieve)

relative cpu design implementation

74hc595 driver 8 led

papers based on distributed arithmetic.

用verilog实现的一个2抽头RLS自适应滤波器的代码(A realization with verilog HDL code of a two-tap RLS adaprive fliter )

FIR滤波器的VHDL语言实现-The implement of FIR Filter based on VHDL

RS 编码和解码Verilog Code, 实现了RS（544,514)的编码和译码；(-RS Coding and Decoding Verilog code，　implement RS（544,514))

DAC0832 接口电路程序.功能：产生频率为762.9Hz的锯齿波DAC0832VHDL程序与仿真-DAC0832 procedures interface circuit. Functions: generate the sawtooth frequency of 762.9Hz and simulation procedures DAC0832VHDL

利用GPIO口模拟I2C通信，驱动富士通MB85RC系列铁电存储器 ** 支持的型号：MB85RC64/64V,MB85RC128/128V,不支持MB85RC16/16V(The master inputs the device address word (8 bits) following the start condition, and then the slave outputs)

数字逻辑与系统的关于所有的器件74LS的介绍，功能表(Digital Logic and System devices 74LS on the introduction of all the menu)