有限状态机 — FSM

Verilog实现 spi接口的FPGA实现 通过仿真，修改后即可应用-Verilog realize spi interface FPGA to achieve through the simulation, the application can be modified

combinatorial modules

generate sine wave. Inputs : Amplitude, phasein, frequency

VHDL servo control from technique of Pulse Width Modulation (PWM )

说明：  使用vivado和Xilinx开发板实现抢答器，开发板为Xilinx Artix-7(Using vivado and Xilinx development board to achieve the responder, the development board is Xilinx artix-7)

对用开发板上开关产生的信息做汉明编码并通过串口发送至电脑(The Hamming code is generated from the switch on the development board and sent to the computer through the serial port.)

实现简单自动售货机的基本功能。投币找零功能，并用Led数码管显示，输出结果用Led显示。(Basic functions simple vending machines. Coin change for function and use Led digital tube display, the output display Led.)

可编程器件厂商Altera出品的8b10b编码器源代码(Giga8b10b v10)

说明：  用VHDL语言实现电子钟(Using VHDL language electronic bell)

基于FPGA的利用rom进行查询的方式生成一个频率为10KHZ的sin信号，编译成功，并实现功能仿真。(Query based on the the FPGA use of rom generate a frequency of 10 kHz sin signal, compiled successfully and to achieve functional simulation.)