kc705 sdi demo

A programming language that can decode alpha numeric

使用STM32官方提供的DSP库进行FFT，虽然在使用上有些不灵活（因为它是基4的FFT，所以FFT的点数必须是4^n），但其执行效率确实非常高效，看图1所示的FFT运算效率测试数据便可见一斑。该数据来自STM32 DSP库使用文档(. Using the official DSP library provided by STM32 for FFT is not flexible in use (because it is the FFT of base 4, so the number of FFT points must be 4 ^ n), but its execution efficiency is really very efficient, as can be seen from the test data of FFT operation efficiency shown in Figure 1. This data comes from STM32 DSP library usage document)

基于FPGA的RS编码器设计，verilog hdl语言。(RS encoder FPGA-based design, verilog hdl language.)

This is a running 10 bit led on VHDL code including switch to shift from increasing or decreasing

uboot i2c driver code for arm a5 dual core cpu imapx820, which is an soc of infotmic.

IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY

说明：  FPGA 读写 SRAM 存储块，verilog代码(Read and write SRAM memory block and Verilog code in FPGA)

AHB BUS 的一些接口代码， verilog, 希望对初学AHB总线的兄弟有所帮助。 里面包含 ahb decode, ahb_mux and ahb2mem. 以及相应的验证环境， 此代码只用于学习，如果用于项目，仅供参考。

说明：  e200 riscv open code user guide

// DEFINES `define BITS 32         // Bit width of the operands `define NumPath 34        module bgm(clock,  reset, sigma_a,  sigma_b,  sigma_c, Fn, dw_x, dw_y, dw_z, dt, Fn_out  ); // SIGNAL DECLARATIONS input clock; input reset; input [`BITS-1:0] sigma_a; input [`BITS-1:0] sigma_b; input [`BITS-1:0] sigma_c; input [`BITS-1:0] Fn; input [`BITS-1:0] dw_x; input [`BITS-1:0] dw_y; input [`BITS-1:0] dw_z; input [`BITS-1:0] dt;